Practice 25 8085 & 8086 Architecture multiple-choice questions designed for CDAC CCAT exam preparation. Click "Show Answer" to reveal the correct option with detailed explanation.
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Correct Answer: B — 8 bits
8085 is an 8-bit microprocessor with an 8-bit data bus for transferring data.
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Correct Answer: B — 16 bits
8085 has a 16-bit address bus, allowing it to address up to 64KB (2^16) of memory.
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Correct Answer: B — 6
8085 has 6 general-purpose 8-bit registers: B, C, D, E, H, and L, which can be paired as BC, DE, HL.
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Correct Answer: A — Address Latch Enable - separates address from multiplexed bus
ALE (Address Latch Enable) signals when valid address is on the lower 8 bits of the multiplexed address/data bus.
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Correct Answer: B — 5
8085 has 5 flags: Sign (S), Zero (Z), Auxiliary Carry (AC), Parity (P), and Carry (CY).
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Correct Answer: B — 16 bits
8086 is a 16-bit microprocessor with a 16-bit data bus for transferring data.
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Correct Answer: B — 20 bits
8086 has a 20-bit address bus, allowing it to address up to 1MB (2^20) of memory.
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Correct Answer: B — BIU and EU
8086 has Bus Interface Unit (BIU) for fetching instructions and Execution Unit (EU) for executing them.
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Correct Answer: B — Fetches instructions and handles bus operations
Bus Interface Unit (BIU) fetches instructions from memory, reads operands, and writes results to memory/ports.
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Correct Answer: B — Decodes and executes instructions
Execution Unit (EU) decodes and executes instructions received from BIU using ALU and registers.
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Correct Answer: B — 4
8086 has 4 segment registers: CS (Code), DS (Data), SS (Stack), and ES (Extra).
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Correct Answer: B — Segment × 16 + Offset
Physical Address = Segment × 16 (shift left 4 bits) + Offset. This gives 20-bit address.
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Correct Answer: C — 6 bytes
8086 has a 6-byte instruction prefetch queue in BIU for pipelining instruction fetch and execute.
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Correct Answer: D — TRAP
TRAP is the highest priority interrupt in 8085 and is non-maskable.
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Correct Answer: A — 003CH
RST 7.5 has vector address 003CH (7.5 × 8 = 60 = 3CH in hex).
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Correct Answer: C — 5
8085 has 5 hardware interrupts: TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR.
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Correct Answer: B — Single processor vs multiprocessor configuration
Minimum mode is for single processor, maximum mode is for multiprocessor systems with additional control signals.
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Correct Answer: B — Primary register for arithmetic/logic operations
The accumulator (A register) is the primary register for ALU operations in 8085, storing one operand and the result.
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Correct Answer: C — 64 KB
With 16-bit address bus, 8085 can address 2^16 = 65,536 bytes = 64 KB of memory.
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Correct Answer: D — 1 MB
With 20-bit address bus, 8086 can address 2^20 = 1,048,576 bytes = 1 MB of memory.
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Correct Answer: B — BX, SI, DI, BP
BX (Base), SI (Source Index), DI (Destination Index), and BP (Base Pointer) can be used for memory addressing.
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Correct Answer: B — Set Interrupt Mask
SIM (Set Interrupt Mask) is used to mask/unmask RST interrupts and control serial output in 8085.
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Correct Answer: B — Read Interrupt Mask
RIM (Read Interrupt Mask) reads the status of interrupt masks and serial input in 8085.
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Correct Answer: B — BIU fetches while EU executes
8086 uses pipelining where BIU fetches next instruction while EU executes current instruction simultaneously.
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Correct Answer: B — 8085 is 8-bit while 8086 is 16-bit with segmented memory
8085 is an 8-bit processor with 64KB memory, while 8086 is 16-bit with 1MB memory using segmented addressing.