Logic Gates - Practice MCQs for CCAT

Correct Answer: C - NAND

NAND and NOR are universal - any circuit can be made using only them.

Correct Answer: B - All inputs are 1

AND gate: output is 1 only when ALL inputs are 1.

Correct Answer: B - At least one input is 1

OR gate: output is 1 when at least one input is 1.

Correct Answer: C - Inverter

NOT gate inverts the input - also called inverter.

Correct Answer: D - Inputs are different

XOR (Exclusive OR): output is 1 when inputs are different.

Correct Answer: B - Both inputs same

XNOR: output is 1 when both inputs are same.

Correct Answer: C - AND followed by NOT

NAND = NOT AND (AND gate output inverted).

Correct Answer: B - OR followed by NOT

NOR = NOT OR (OR gate output inverted).

Correct Answer: D - Output equals input

Buffer: output = input (used for signal strengthening).

Correct Answer: D - Connect both inputs together

NAND with both inputs same: A NAND A = A' (NOT A).

Correct Answer: B - AND gate

AND gate outputs 1 only when all inputs are 1. If any input is 0, output is 0.

Correct Answer: B - OR gate

OR gate outputs 1 when at least one input is 1. Output is 0 only when all inputs are 0.

Correct Answer: A - 0

NAND is NOT-AND. When all inputs are 1, AND gives 1, then NOT inverts it to 0.

Correct Answer: D - 1

NOR is NOT-OR. When all inputs are 0, OR gives 0, then NOT inverts it to 1.

Correct Answer: C - 0

XOR (exclusive OR) outputs 0 when both inputs are same (both 0 or both 1), and 1 when inputs differ.

Correct Answer: D - 1

XNOR outputs 1 when both inputs are same, and 0 when inputs differ. It is the complement of XOR.

Correct Answer: D - 2

AND = NAND followed by NOT. Use one NAND gate, then another NAND as NOT (inputs tied). Total: 2 gates.

Correct Answer: A - A'·B + A·B'

XOR can be expressed as A'·B + A·B', which gives 1 when inputs differ and 0 when same.

Correct Answer: A - XOR gate

XOR can act as controlled inverter. If control input is 0, output = input. If control is 1, output = complement of input.

Correct Answer: B - Time for output to change after input changes

Propagation delay is the time taken for the output of a gate to change in response to a change in input.

Correct Answer: B - Maximum number of gate inputs it can drive

Fan-out is the maximum number of gate inputs that a gate output can reliably drive without signal degradation.

Correct Answer: C - Number of inputs the gate can accept

Fan-in is the number of inputs a gate can accept. Higher fan-in gates may have slower operation.

Correct Answer: B - CMOS

CMOS (Complementary Metal-Oxide-Semiconductor) has the lowest static power consumption.

Correct Answer: A - Logic with 0, 1, and high-impedance states

Tri-state outputs can be 0, 1, or high-impedance (Z), allowing multiple outputs to share a bus.

Correct Answer: B - CMOS switch that passes signal when enabled

A transmission gate is a CMOS analog switch that passes an input signal when the control is active.

Correct Answer: C - AND gate

The AND gate produces output 1 only when ALL inputs are 1. For any other input combination, the output is 0.

Correct Answer: A - AND followed by NOT

NAND = NOT + AND. The NAND gate first performs AND operation on inputs and then inverts the result. Output = (AB)'.

Correct Answer: A - NAND and NOR

NAND and NOR are universal gates because any Boolean function can be implemented using only NAND gates or only NOR gates. They can realize AND, OR, and NOT functions.

Correct Answer: D - Connect both inputs of NAND gate together

When both inputs of a NAND gate are connected to the same signal A, the output is (A·A)' = A'. This implements a NOT gate using a single NAND gate.

Correct Answer: A - 0

XOR gives output 1 only when inputs are different. When both inputs are 1 (same), the output is 0. XOR: A ⊕ B = A'B + AB'.

Correct Answer: A - NOR gate

An OR gate followed by an inverter gives NOR output: (A + B)'. This is the definition of a NOR gate.

Correct Answer: C - 3

To implement OR using NAND: First, invert each input using 2 NAND gates (connecting inputs together), then use a third NAND gate on the inverted inputs. A + B = (A'·B')' requires 3 NAND gates.

Correct Answer: C - (A + B + C)'

A NOR gate ORs all inputs and then inverts the result. For 3 inputs: Output = (A + B + C)'.

Correct Answer: C - XOR gate

The XOR gate is called an inequality detector because it gives output 1 when the inputs are NOT equal (different). It detects inequality between two inputs.

Correct Answer: D - 3

To implement AND using NOR: Invert each input using 2 NOR gates (connecting inputs together), then apply NOR on inverted inputs. A·B = (A' + B')' requires 3 NOR gates.

Correct Answer: A - 1

In positive logic convention, a higher voltage level (logic HIGH) represents binary 1, and a lower voltage level (logic LOW) represents binary 0.

Correct Answer: B - Equivalence gate

The XNOR gate is called an equivalence gate because it produces output 1 when both inputs are equal (both 0 or both 1). Output = AB + A'B'.

Correct Answer: C - 0

AND gate output is 1 only when ALL inputs are 1. Since B = 0, the output is A · B = 1 · 0 = 0.

Correct Answer: A - XOR gate

The XOR gate acts as a controlled inverter. When one input (control) is 1, it inverts the other input. When control is 0, the output equals the other input.

Correct Answer: D - 2

An AND gate can be implemented using 2 NAND gates: First NAND gate gives (AB)', then a second NAND gate with both inputs connected together inverts it to give ((AB)')' = AB.

Correct Answer: D - Time for output to change after input changes

Propagation delay is the time taken for the output of a gate to change in response to a change in input. It is a critical parameter affecting the maximum operating speed of digital circuits.

Correct Answer: B - Maximum number of gates that can be driven by the output

Fan-out is the maximum number of gate inputs that the output of a gate can drive without degrading the output voltage levels beyond acceptable limits.

Correct Answer: D - ECL

ECL (Emitter-Coupled Logic) has the lowest propagation delay among these families because transistors never saturate, allowing very fast switching speeds.

Correct Answer: A - Inversion (complement)

A bubble (small circle) at the output of a gate symbol indicates inversion or complementation of the output. It denotes that the output is the complement of the basic gate function.

Correct Answer: B - XNOR gate

Y = (A ⊕ B)' is the complement of XOR, which is XNOR. The XNOR gate output is 1 when inputs are equal: Y = AB + A'B'.

Correct Answer: C - 16

A truth table for n inputs has 2ⁿ rows. For 4 inputs: 2⁴ = 16 rows, covering all possible input combinations.

Correct Answer: C - 3

A tri-state (three-state) buffer has three output states: logic 0, logic 1, and high-impedance (Hi-Z). The Hi-Z state effectively disconnects the output from the circuit.

Correct Answer: A - 1

NAND output = (A·B)'. When A=0 and B=0: (0·0)' = 0' = 1. A NAND gate gives output 0 only when all inputs are 1.

Correct Answer: D - XOR gate

XOR gates are used as parity generators/checkers. Cascading XOR gates produces the XOR of all inputs, which gives the parity (even/odd) of the number of 1s in the input.

Correct Answer: A - OR gate

An AND gate in negative logic performs the OR function in positive logic, and vice versa. This is because negative logic swaps the roles of 0 and 1, which is equivalent to applying De Morgan's theorem.